Edge Bend for Isolation Packages

ABSTRACT

In one instance, a semiconductor isolation package includes a leadframe that includes a plurality of leadframe leads. At least one of the plurality of leadframe leads includes a lead body having a first end that comprises an external pin portion and a second end. The lead body has a leg portion coupled to a central lead portion that is coupled to an edge bend portion. The edge bend portion is formed by a first bend on the lead body proximate the second end between the central lead portion and edge bend portion. The first bend is in the direction of the first end on the leg portion. The edge bend assists in shielding electronic fields. Other aspects are presented.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the benefit of and priority to U.S. ProvisionalApplication Ser. No. 62/571,091, filed Oct. 11, 2017, which is herebyfully incorporated herein by reference for all purposes.

TECHNICAL FIELD

This relates generally to semiconductor devices, and more particularlysemiconductor isolation packages.

BACKGROUND

Semiconductor devices are used in many applications. In some instances,a semiconductor isolation device is used to provide isolation of a humanuser or equipment from a high voltage spike. These isolation deviceshave two main failure modes: package failure or component failure. Themore common failure mode in some instances is package failure. Theisolation devices are tested to demonstrate a certain voltage ratingwithout arc failure.

SUMMARY

In one aspect, a semiconductor isolation package includes a leadframethat includes a plurality of leadframe leads. At least one of theplurality of leadframe leads includes a lead body having a first endthat comprises an external pin portion and a second end, and wherein thelead body has a leg portion coupled to a central lead portion that iscoupled to an edge bend portion. The edge bend portion is formed by afirst bend on the lead body proximate the second end between the centrallead portion and edge bend portion. The first bend is in the directionof the first end on the leg portion.

According to an aspect, an isolation semiconductor package includes aleadframe that includes a plurality of leadframe leads having a firstend and a second end. The first end comprises an external pin portion.At least one of the leadframe leads of the plurality of leadframe leadsincludes a lead body having a leg portion coupled to a central leadportion coupled to edge bend portion, and wherein a first bend is formedbetween the central lead portion and the edge bend portion. The firstbend is formed in the direction of the first end. The isolationsemiconductor package also includes a first die pad, which is a downsetdie pad, coupled to at least one of the plurality of leadframe leads.The central lead portion of the at least one of the leadframe leads ofthe plurality of leadframe leads extends along a first plane in a firstdirection and the first die pad is at least partially in a second planethat is parallel to the first plane. The first plane is displaced fromthe second plane in a second direction that is orthogonal to the firstdirection and is displaced towards the first end of the plurality ofleadframe leads. The isolation semiconductor package also includes acomponent coupled to the first die pad and a mold compound substantiallycovering the first die pad, the component, and at least the edge bendportion of the at least one of the leadframe leads of the plurality ofleads.

According to an aspect, a semiconductor isolation package includes aleadframe, and the leadframe includes a plurality of leadframe leadsincluding a first end that forms an external pin portion and a secondend. Each of the plurality of leadframe leads includes a lead bodyhaving a leg portion proximate the first end and coupled to a centrallead portion that is coupled to an end portion at the second end. Atleast some of the plurality leadframe leads include a first internaledge on the second end and at least some of the plurality of leadframeleads include a second internal edge on the second end and that isopposed to the first internal edge. The semiconductor isolation packagefurther includes a downset die pad positioned between the first internaledge and the second internal edge. Wherein the downset die pad isdisplaced from the second end of the plurality of leadframe leads in adirection towards the first end of the plurality leadframe leads. Atleast one of the plurality of leadframe leads is formed with a bendbetween the central lead portion and the end portion to form an edgebend. The bend is in a same direction as the second plane is displacedfrom the first plane. Other aspects are disclosed herein.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1A is a schematic, perspective view of a semiconductor isolationpackage, according to an illustrative arrangement;

FIG. 1B is a side elevation cross sectional view of a portion of thesemiconductor isolation package of FIG. 1A;

FIG. 2 is a schematic, perspective view of a plurality of leadframeleads of a semiconductor isolation package, according to an illustrativearrangement;

FIG. 3 is a side elevation cross sectional view of a portion of asemiconductor isolation package showing qualitatively the presence of anelectrical field when the semiconductor isolation package is undergoinga test; and

FIG. 4 is a side elevation cross sectional view of a portion of asemiconductor isolation package having an illustrative edge bend portionand showing qualitatively the presence of an electrical field when thesemiconductor isolation package is undergoing a test.

DETAILED DESCRIPTION

With respect to semiconductor isolation devices that are meant toprotect a human user or a piece of equipment, it is desirable tominimize package failure. Package failure occurs when an arc occursacross the package. For a package under electrical stress, an electricalfield develops on an interior of the package and can grow and extendoutside the package. When that happens the electrical field outside ismore likely to ionize air or the exterior gas or gases and increases thechances of an arc.

In one aspect, arc-failure of an isolation package is decreased by aleadframe that reduces the external electrical field that develops bycontaining the electrical field in the package. The electrical field iscontained by shielding the area toward the closest or nearby leads bybending down an internal edge portion of the leads. The leads are benttowards the ends of the external pins and towards a downset die pad.

Referring now to the drawings, and initially and primarily to FIGS.1A-1B, an illustrative semiconductor isolation package 100 is shown inperspective view. The semiconductor isolation package 100 includes aleadframe 101 having a first die pad 102, which is a downset die pad, asecond die pad 104, and third die pad 106. A component 108 is coupled tothe first die pad 102. In this instance, the component 108 is atransformer 110. A first die 112 is coupled to the second die pad 104,and a second die 114 is coupled to the third die pad 106.

A plurality of leadframe leads 116 include a first end 118 thatcomprises an external pin portion 120 and a second end 122 thatcomprises an edge portion 124, or inner edge or internal edge. The edgeportion 124 is the end of the lead 116 that is closest to one or moredie pads (e.g., die pad 102). As used herein, “plurality” means two ormore. At least some of the plurality leadframe leads 116 make up a firstinternal edge 126 and at least some of the plurality of leadframe leads116 make up a second, opposed internal edge 128. The die pads 102, 104,and 106 are disposed between the first internal edge 126 and the secondinternal edge 128. In terms of arc-failure, the location of greatestconcern is where the smallest gap (compared to other gaps in thepackage) is formed between leadframe leads 116 and components that havethe greatest potential difference, and in this illustrative arrangement,it will be appreciated that an external edge 130 (FIG. 2) of the firstdie pad 102 is closest to the first internal edge 126 at the second end122. The first die pad 102, which is a downset die pad, is positioned oroffset closer to the first internal edge 126. The internal edge 128 ofthe lead forming the second internal edge 128 is electrically coupled todie pad 102 and conductor 146 so that there is no electrical potentialdifference between these edges.

At least one 115 of the plurality of leadframe leads 116 includes a leadbody 117 having and extending between the first end 118 and the secondsend 122. The first end 118 forms an external pin portion. The lead body117 has a leg portion 119 coupled to a central lead portion 121 that iscoupled to the edge bend portion 138. The edge bend portion 138 isformed by a first bend 123 on the lead body 117 proximate the second end122 between the central lead portion 121 and edge bend portion 138. Thefirst bend 123 is in the direction of the first end 118, e.g., down inthe orientation of FIG. 1B, on the leg portion 119. The edge bendportion 138 assists in shielding an electrical field as describedelsewhere herein.

The edge portion 124 of the plurality of leadframe leads 116 that formthe first internal edge 126 is coupled to the central lead portion 121is in a first plane (see by analogy plane 220 in FIG. 2) extending in afirst direction 132 and wherein the first die pad 102 is in a secondplane (see by analogy plane 228 in FIG. 2) parallel to the first planeand extending in the first direction 132 and displaced in a seconddirection 134 towards the first end 118 of the plurality of leadframeleads 116. Thus, for the orientation of FIGS. 1A-1B, the first die pad102 extends downwardly, the first end of the plurality of leadframes 116extends downwardly, and, as will be explained below, the edge bendportion 138 also extends downwardly. The first die pad 102 is downset bydownsets 133 and 135.

The area generally indicated 136 in FIG. 1B is where an electric fieldwill begin to center and grow during a high voltage scenario, and forthat reason, the edge bend portion 138 has been formed at the second end122 of at least a number of the leadframe leads 116 in the area 136. Theedge bend portion 138 shields or blocks the electric field from movingout of the package and toward the first end 118 of the leadframes 116.This is further clarified by comparing FIGS. 3 and 4 that are discussedfurther below. The second end 122 of at least some of the plurality ofleadframe leads 116 that form the first internal edge 126 have the edgebend portion 138 that extends in a direction going from the central leadportion 121, which extends along the first plane (see 220 in FIG. 2),towards the second plane (see 228 in FIG. 2). The edge bend portion 138is formed with the bend 123 made in the range of 20-300 micrometers fromthe second end 122 and in another arrangement in the range of 150-300micrometers from the second end 122. In one illustrative arrangement,the bend 123 of the edge bend portion 138 is formed at least 35micrometers from the edge portion 124.

The first ends 118 of the plurality of leadframe leads 116 on a firstlateral side 140, which is shown clearly in FIG. 1B and are the sameside as the first internal edge 126, are electrically coupled to a firsttest conductor 142 or, if individual sites, land pads. Likewise, thefirst ends 118 of the plurality of leadframe leads 116 on a secondlateral side 144, which includes the second internal edge 128, areelectrically coupled to a second test conductor 146 or, if individualsites, land pads.

In this illustrative example, bond wires 148 interconnect the first die112 with some of the plurality of leadframe leads on the first lateralside 140. Bond wires 150 interconnect the first die 112 and thecomponent 108. Bond wires 152 interconnect the second die 114 and thecomponent 108. Bond wires 154 interconnect the second die 114 and someof the plurality of leadframe leads 116 on the second lateral side 144.Bond wires 156 interconnect the component 108 and some of the pluralityof leadframe leads 116 on the second lateral side 144. Bond wires 157interconnect the component 108 and some of the plurality of leadframeleads 116 on the first lateral side 140.

The semiconductor isolation package 100 includes a mold compound 158that in a completed state covers at partially the die pad 102, thecomponent 108, and at least the edge bend portion 138 of at least one ofthe leadframe leads. The semiconductor isolation package 100 has thefirst lateral side 140 and opposing second lateral side 144, and has afirst longitudinal side 160 and an opposing second longitudinal side162.

In some arrangements, the external or outward-facing edge 130 of thedownset die pad 102 may be formed with a stepped portion 164 (FIG. 1B)at the edge 130; that is, half the thickness or some percentage of thethickness may be removed. In one illustrative example, the steppedportion has a thickness on the external edge that has been reduced by atleast 30%. In some arrangements, the stepped portion 164 may be ahalf-etch. The stepped portion 164 is a feature that helps pull theelectrical field up (for the orientation shown) a bit and makes a higherfield with a smaller volume and that is better for reducing thearc-failure risk of the package 100.

While other components 108 might be used, the semiconductor isolationpackage 100 is shown with the component 108 in the form of thetransformer 110. As shown clearly in FIG. 1B, the transformer 110includes a first coil 170 that is displaced from a second coil 172. Afirst magnetic member 174 is placed and glued or otherwise attached atthe top (further in the second or y-direction 134) for the orientationshown of the transformer 110 and a second magnetic member 176 is placedand glued or otherwise attached at the bottom for the orientation shown(further down in the y-direction 134). The magnetic members 174, 176 maybe ferrite members. The transformer 110 is more efficient when larger,and accordingly, the larger size makes the gap discussed herein smaller.The edge bend 138 assists with accommodating the larger size withoutcompromising the rating of the semiconductor isolation package 100.

FIG. 1A shows the edge bend 138 associated with five leadframe leads,but it should be understood that the edge bend 138 could have fewer ormore leads involved. Only five were used in this arrangement because thefive leadframe leads are the closest—forms the smallest gap—between theleadframe leads and the downset die. It will be appreciated then that atleast some of the plurality of leadframe leads 116 that include the edgebend portion 138 include a leadframe lead 178 that is closest to thedownset die pad 102.

Referring now primarily to FIG. 2, a portion of a leadframe 200 for usewith semiconductor isolation packages is presented in a perspectiveview. The portion shown corresponds with aspects of the illustrativesemiconductor isolation package 100 of FIG. 1A and more particularlywith portions proximate the first lateral side 140 and the firstlongitudinal side 160, namely with portions 166 and 168 from FIG. 1A.

The leadframe 200 includes a plurality of leadframe leads 202 that eachhave a first end 204 and a second end 206 of a lead body 203. In thisinstance each leadframe lead 202 has a leg portion 212 that has a footportion 208 at the first end 204. The foot portion 208 extends generallyin the x-direction 210 for the orientation shown. A majority of the legportion 212 extends generally in the y-direction 214—generally upwardfor the orientation shown. The leg portion 212 transitions to a centrallead portion 216 that is again primarily in the x-direction 210 untilreaching a bend 224. A bend 221 transitions the lead body 203 from theleg portion 212 to the central lead portion 216. At the bend 224, thecentral lead portion 216 transitions to an end portion 225. That is,proximate leading edge 234, the bend 224 in the lead body 203 forms theedge bend 218.

The edge bend 218 is formed at the second end 206 and angles down (forthe orientation shown). The central lead portion 216 is largely (amajority in this embodiment) coplanar with a first reference plane 220and the edge bend 218 extends away from the reference plane 220. In thisillustrative arrangement, the central lead portion 216 forms a unifiedplank member 222 that has the bend 224 of between about 20 and 60degrees from the first plane 220 to form the edge bend 218. The anglemay be determined using another reference as described in connectionwith FIG. 3 further below.

The edge bend 218 extends downwardly and may include a unified plank224. The bend 224 is from an end of the central lead portion 216 that isin the first plane 220 towards an outer edge 224 of a downset die pad226. A substantial or majority of a planar portion of the downset diepad 226 is partially coplanar with a second plane 228. The second plane228 is displaced by a dimension 230 from the first plane 220 in they-direction 214. The displacement represented by dimension 230 may varyfor different applications, but in one instance is between 200 and 400microns. In one illustrative arrangement, the displacement 230 is 75microns. The edge 224 of the downset die pad 226 may be formed with astepped, or inverted stepped, portion 232. The stepped portion may beformed by reducing the thickness of the die pad 226 on the edge 224.

While only a portion of the leadframe 200 is shown, it should beunderstood that the gap between the leading edge 234 of the edge bend218 and the edge 224 of the downset die pad 226 represents the smallestgap of the associated package and, thus, the likely location for anelectrical field to develop when a package with the leadframe 200 isunder high voltage. A planar base 236 or surface of the edge bend 218shields the foot portion 208 of the leg portion 212 of the nearbyleadframe leads 202 and thereby may prevent an electric field fromforming outside of a mold compound (see 158 in FIG. 1A).

A qualitative discussion of performance vis-a-vis an electrical field ofan illustrative arrangement of a semiconductor isolation package 400will now be presented in connection with FIGS. 3 and 4. Referringinitially to FIG. 3, a portion of the semiconductor isolation package300 is shown in cross section and for reference without an edge bend(see 218 in FIG. 2) but the edge bend will be shown in FIG. 4. Thesemiconductor isolation package 300 is analogous in most respects tothose of FIGS. 1-2 and corresponds with aspects of the illustrativesemiconductor isolation package 100 of FIG. 1A, and more particularly,with portions proximate the first lateral side 140 and firstlongitudinal side of the 160. Because the semiconductor isolationpackage 300 is analogous in most respects, all the details are notdescribed again.

FIG. 3 shows a tester contactor 302 on one lateral side 304 of thesemiconductor isolation package 300. A foot portion 306 or land pad of aleadframe lead 308 at a first end 309 is shown on the tester contactor302. The leadframe lead 308, which is a plurality in a row, has legportion 310 and a central lead portion 312 with a bend 311 therebetween.Unlike other figures, the central lead portion 312 does not have secondbend transitioning to an edge bend. Thus an internal edge 314 on secondend 315 is across and above an edge 316 of a downset die pad 318.

The downset die pad 318 has a component 320 that is a transformer 322.The transformer 322 has a first coil 323 and a second coil 325. A moldcompound 324 is over molded to form an exterior of the package or coverat least a portion of the components therein. In the arrangement of FIG.3, which is meant to show qualitative results based on modeling results,the most concentrated electrical field 326 descends down toward thetester contactor 302 with a portion 328 formed outside the package 300.The portion 328 outside may ionize the air and make an arc failure morelikely. This view also shows that the lower portion 330 forms a largerportion 332 when outside the package because the dielectric of air isless. This arrangement is mainly presented for contrast with thebenefits of adding an edge bend, but it also facilitates another way toview the angle of the edge bend as will now be described.

If a reference line 343 is drawn from the closest two portions betweenthe internal edge 314 of the leadframe and the edge 316 of the downsetdie 318, that reference line 343 is one that may be used to describe anangle 336 between the reference line 334 and the edge bend 438 (as shownin FIG. 4). Said another way, the reference line 334 forms a shortestline from the second end 315 or internal edge 314 of the plurality ofleadframes when positioned without a bend to a closest point of theexternal edge 316 of the downset die pad 318. The angle 336 is between30 and 50 degrees in one arrangement. The angle 336 is between 40 and 50degrees in another arrangement. The angle 336 is 45 degrees in stillanother arrangement.

Referring now primarily to FIG. 4, a semiconductor isolation package 400(analogous to isolation package 300 of FIG. 3) is presented with twomain changes: a bend 437 has been added to form an edge bend 438 and theresultant electrical field is different. Now when the high voltage isapplied across the semiconductor isolation package 400, the strongestelectrical field 440 is at least partially blocked, shielded, orotherwise influenced by the edge bend 438. The edge bend 438 keeps theelectrical field 440 more centrally located and higher up away from thecontactor 402 or foot portion 406 of the leadframe lead 408. While anelectrical field 442 is shown on an end of the tester contactor 402, theelectrical field 442 is small by comparison and does not extend from thepackage 400 itself to that point. This qualitative presentation is meantto show what is believed to be the reason the edge bend 438 assists inreducing arc-failure of the package 400.

Referring again primarily to FIG. 2, in one embodiment, the lead 202 maybe part of any semiconductor package that has a central lead portion 216that extends substantially in the reference plane 220 and then bends atbend 224 downward for orientation shown (same general direction as theleg portion 212) and extends away from the central lead portion 216 toform the edge bend 218. In one example the leg portion 212 may be a gullwing on a quad flat package (QFP) or other package and the central leadportion 216 extends in a plane (see, e.g., plane 220) and then bends(see bend 224) in the same direction (down for orientation of FIG. 2).

Continuing to refer primarily to FIG. 2 and with an alternativepresentation, at least one lead 202 of a semiconductor package has afirst end 204 that forms an external pin portion 212 and a second end206 that forms an inner edge portion 234. A central lead portion 216extends between the external pin portion 212 and an edge bend 218, whichis formed proximate the second end 206. The external pin portion 212,central lead portion 216, and edge bend 218 are all primarily indifferent planes. A bend 224 formed between the edge bend 218 and thecentral lead portion 216 is formed with an angle between 20 and 60degrees in the same direction as towards the external pin portion 212.In another arrangement, the angle is between 30 and 50 degrees. Inanother arrangement the angle is 45 degrees. A “bend” is where a portionhas been forced or formed to go from straight to curved or angular, orto go from one degree of curved to distinctly more curved.

In one arrangement, a semiconductor package comprises a leadframe andthe lead frame includes at least one lead having a first end that formsan external pin portion and a second end, and further having a centrallead portion that extends between the external pin portion and an edgebend. The edge bend is formed proximate the second end. The central leadportion and the edge bend are primarily in different planes. A bend isformed between the edge bend and the central lead portion that is in thesame direction as towards the external pin portion (.e.g., downward fororientation of the figures herein).

In an alternative arrangement to those previously presented, the edgebend is bent away from the leg portion (opposite direction from shown inFIGS. 1-2) to pull the electrical field upward.

Modifications are possible in the described arrangements, and otherarrangements are possible, within the scope of the claims. It should beunderstood that while certain semiconductor package types are shownherein for illustration purposes, the disclosure contemplates othersemiconductor package types as well.

What is claimed is:
 1. A semiconductor isolation package comprising a leadframe, the lead frame comprising: a plurality of leadframe leads, wherein at least one of the plurality of leadframe leads comprises: a lead body having a first end that comprises an external pin portion and a second end, wherein the lead body has a leg portion coupled to a central lead portion that is coupled to an edge bend portion, wherein the edge bend portion is formed by a first bend on the lead body proximate the second end between the central lead portion and edge bend portion, and wherein the first bend is in the direction of the first end on the leg portion.
 2. The semiconductor isolation package of claim 1, wherein the first bend comprises an angle that is between 20 and 60 degrees.
 3. The semiconductor isolation package of claim 1, wherein the first bend comprises an angle that is between 30 and 55 degrees.
 4. The semiconductor isolation package of claim 1, wherein the first bend comprises an angle that is between 40 and 50 degrees.
 5. The semiconductor isolation package of claim 1, wherein the first bend is formed at least 35 micrometers from the second end.
 6. The semiconductor isolation package of claim 1, wherein a second bend is formed between the leg portion and central portion.
 7. The semiconductor isolation package of claim 1, wherein the first bend comprises an angle that is between 30 and 50 degrees, wherein the first bend is formed at least 35 micrometers from the second end, and wherein a second bend is formed between the leg portion and central portion.
 8. An isolation semiconductor package comprising: a leadframe comprising: a plurality of leadframe leads comprising a first end and a second end, the first end comprises an external pin portion, wherein at least one of the leadframe leads of the plurality of leadframe leads comprises a lead body having a leg portion coupled to a central lead portion coupled to edge bend portion, wherein a first bend is formed between the central lead portion and the edge bend portion and the first bend is formed in the direction of the first end, a first die pad, which is a downset die pad, coupled to at least one of the plurality of leadframe leads, and wherein the central lead portion of the at least one of the leadframe leads of the plurality of leadframe leads extends along a first plane in a first direction and wherein the first die pad is at least partially in a second plane that is parallel to the first plane, and wherein the first plane is displaced from the second plane in a second direction that is orthogonal to the first direction and is displaced towards the first end of the plurality of leadframe leads; a component coupled to the first die pad; a mold compound substantially covering the first die pad, the component, and at least the edge bend portion of the at least one of the leadframe leads of the plurality of leads.
 9. The isolation semiconductor package of claim 8, wherein first die pad is within 600 micrometers of the second end of the plurality of leadframe leads.
 10. The isolation semiconductor package of claim 8, wherein the component comprises a transformer having a laminate, and wherein first die pad is within 600 micrometers of the second end of the plurality of leadframe leads.
 11. The isolation semiconductor package of claim 8, wherein the first bend is formed at least 35 micrometers from the second end.
 12. The isolation semiconductor package of claim 8, wherein the edge bend portion forms an angle between a reference line and the edge bend portion; wherein the reference line extends from the second end of the at least one of the leadframe leads of the plurality of leadframes when positioned without a bend to a closest point of the first die pad; wherein the angle is between 30 and 50 degrees; and wherein the first bend is formed at least 35 micrometers from the second end.
 13. The isolation semiconductor package of claim 12, wherein the angle is between 40 and 50 degrees.
 14. The isolation semiconductor package of claim 12, wherein the angle is 45 degrees.
 15. The isolation semiconductor package of claim 8, wherein the first die pad has an external edge closest to the second end of the plurality of leadframe leads that is formed with a stepped portion.
 16. The isolation semiconductor package of claim 15, wherein a thickness of the external edge forming the stepped portion is 70% or less of a thickness of other portions of the first die pad.
 17. The isolation semiconductor package of claim 8, wherein the second plane is displaced from the first plane by at least 75 micrometers.
 18. The isolation semiconductor package of claim 8, wherein the component comprises a transformer having a laminate; wherein first die pad is within 600 micrometers of the second end of the plurality of leadframe leads; wherein the second plane is displaced from the first plane by at least 75 micrometers; wherein the edge bend portion forms an angle between a reference line and the edge bend portion and wherein the reference line extends from the second end of the at least one of the leadframe leads of the plurality of leadframes when positioned without a bend to a closest point of the first die pad; and wherein the angle is between 30 and 50 degrees.
 19. A semiconductor isolation package comprising a leadframe, the leadframe comprising: a plurality of leadframe leads comprising a first end that comprises an external pin portion and a second end; wherein each of the plurality of leadframe leads comprises a lead body having a leg portion proximate the first end and coupled to a central lead portion that is coupled to an end portion at the second end; wherein at least some of the plurality leadframe leads comprise a first internal edge on the second end and at least some of the plurality of leadframe leads comprise a second internal edge on the second end and that is opposed to the first internal edge; a downset die pad positioned between the first internal edge and the second internal edge and, wherein the downset die pad is displaced from the second end of the plurality of leadframe leads in a direction towards the first end of the plurality leadframe leads; wherein at least one of the plurality of leadframe leads is formed with a bend between the central lead portion and the end portion to form an edge bend, wherein the bend is in a same direction as the second plane is displaced from the first plane.
 20. The semiconductor package of claim 19, wherein the bend formed between the central lead portion and end portion is between 20 and 60 degrees.
 21. The semiconductor package of claim 19, wherein the bend is formed at least 35 micrometers from the second end.
 22. The semiconductor package of claim 19, wherein the downset die is positioned closer to the first internal edge than to the second internal edge. 